ASIC/FPGA Design and Verification Engineer

Key Highlights

• A challenging role where you work closely with a highly skilled team as well as interfacing to engineers in leading international companies
• Access to the latest technologies and ongoing professional development, including training with ASIC tools from the top EDA vendors in the SyoSil partnership portfolio
• A competitive salary and a flexible working environment
• You have a B.Sc. or an M.Sc. in electrical engineering or computer science, and you know how to debug complex systems in a traditional ASIC/FPGA design simulation environment.
• You have solid skills within RTL module design (Verilog/VHDL), and/or experience in verification using constrained random verification methodologies, (SystemVerilog/UVM).